W6GR-2
Ayrıştırılmamış paketler
Satırlar APRS-IS'ten geldiği haliyle, en yenisi üstte. Son 7 gün saklanır.
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W6GR-2>APD000,WIDE2-2,qAR,KF6NXQ-15:> #0901 10 T1=000, T2=000, V1= ON rpi 09/10/26-10:19:06 - :
W6GR-2>APD000,WIDE2-2,qAR,KF6NXQ-15:> #0900 10 T1=000, T2=000, V1= ON rpi 09/10/26-09:59:06 - :
W6GR-2>APD000,WIDE2-2,qAR,KF6NXQ-15:> #0899 10 T1=000, T2=000, V1= ON rpi 09/10/26-09:39:06 - :
W6GR-2>APD000,WIDE2-2,qAR,KF6NXQ-15:> #0897 10 T1=000, T2=000, V1= ON rpi 09/10/26-08:59:06 - :
W6GR-2>APD000,WIDE2-2,qAR,KF6NXQ-15:> #0896 10 T1=000, T2=000, V1= ON rpi 09/10/26-08:39:06 - :
W6GR-2>APD000,WIDE2-2,qAR,KF6NXQ-15:> #0895 10 T1=000, T2=000, V1= ON rpi 09/10/26-08:19:06 - :
W6GR-2>APD000,KF6ILA-10*,qAR,XE2SI-10:> #0894 10 T1=000, T2=000, V1= ON rpi 09/10/26-07:59:05 - :
W6GR-2>APD000,WIDE2-2,qAR,KF6NXQ-15:> #0893 10 T1=000, T2=000, V1= ON rpi 09/10/26-07:39:05 - :
W6GR-2>APD000,WIDE2-2,qAR,KF6NXQ-15:> #0892 10 T1=000, T2=000, V1= ON rpi 09/10/26-07:19:05 - :
W6GR-2>APD000,WIDE2-2,qAR,KF6NXQ-15:> #0891 10 T1=000, T2=000, V1= ON rpi 09/10/26-06:59:05 - :
W6GR-2>APD000,WIDE2-2,qAR,KF6NXQ-15:> #0890 10 T1=000, T2=000, V1= ON rpi 09/10/26-06:39:05 - :
W6GR-2>APD000,WIDE2-2,qAR,KF6NXQ-15:> #0889 10 T1=000, T2=000, V1= ON rpi 09/10/26-06:19:05 - :
W6GR-2>APD000,WIDE2-2,qAR,KF6NXQ-15:> #0888 10 T1=000, T2=000, V1= ON rpi 09/10/26-05:59:05 - :
W6GR-2>APD000,WIDE2-2,qAR,KF6NXQ-15:> #0887 10 T1=000, T2=000, V1= ON rpi 09/10/26-05:39:05 - :
W6GR-2>APD000,WIDE2-2,qAR,KF6NXQ-15:> #0886 10 T1=000, T2=000, V1= ON rpi 09/10/26-05:19:04 - :
W6GR-2>APD000,WIDE2-2,qAR,KF6NXQ-15:> #0885 10 T1=000, T2=000, V1= ON rpi 09/10/26-04:59:04 - :
W6GR-2>APD000,WIDE2-2,qAR,KF6NXQ-15:> #0884 10 T1=000, T2=000, V1= ON rpi 09/10/26-04:39:04 - :
W6GR-2>APD000,WIDE2-2,qAR,KF6NXQ-15:> #0883 10 T1=000, T2=000, V1= ON rpi 09/10/26-04:19:04 - :
W6GR-2>APD000,KF6ILA-10*,qAO,W6UFX:> #0882 10 T1=000, T2=000, V1= ON rpi 09/10/26-03:59:04 - :
W6GR-2>APD000,WIDE2-2,qAR,KF6NXQ-15:> #0882 10 T1=000, T2=000, V1= ON rpi 09/10/26-03:59:04 - :
W6GR-2>APD000,WIDE2-2,qAR,KF6NXQ-15:> #0881 10 T1=000, T2=000, V1= ON rpi 09/10/26-03:39:04 - :
W6GR-2>APD000,WIDE2-2,qAR,KF6NXQ-15:> #0880 10 T1=000, T2=000, V1= ON rpi 09/10/26-03:19:04 - :
W6GR-2>APD000,WIDE2-2,qAR,KF6NXQ-15:> #0879 10 T1=000, T2=000, V1= ON rpi 09/10/26-02:59:03 - :
W6GR-2>APD000,WIDE2-2,qAR,KF6NXQ-15:> #0878 10 T1=000, T2=000, V1= ON rpi 09/10/26-02:39:03 - :
W6GR-2>APD000,WIDE2-2,qAR,KF6NXQ-15:> #0877 10 T1=000, T2=000, V1= ON rpi 09/10/26-02:19:03 - :
W6GR-2>APD000,WIDE2-2,qAR,KF6NXQ-15:> #0876 10 T1=000, T2=000, V1= ON rpi 09/10/26-01:59:03 - :
W6GR-2>APD000,WIDE2-2,qAR,KF6NXQ-15:> #0875 10 T1=000, T2=000, V1= ON rpi 09/10/26-01:39:03 - :
W6GR-2>APD000,WIDE2-2,qAR,KF6NXQ-15:> #0874 10 T1=000, T2=000, V1= ON rpi 09/10/26-01:19:03 - :
W6GR-2>APD000,WIDE2-2,qAR,KF6NXQ-15:> #0873 10 T1=000, T2=000, V1= ON rpi 09/10/26-00:59:03 - :
W6GR-2>APD000,WIDE2-2,qAR,KF6NXQ-15:> #0872 10 T1=000, T2=000, V1= ON rpi 09/10/26-00:39:02 - :
W6GR-2>APD000,WIDE2-2,qAR,KF6NXQ-15:> #0871 10 T1=000, T2=000, V1= ON rpi 09/10/26-00:19:02 - :
W6GR-2>APD000,WIDE2-2,qAR,KF6NXQ-15:> #0870 10 T1=000, T2=000, V1= ON rpi 09/09/26-23:59:02 - :
W6GR-2>APD000,WIDE2-2,qAR,KF6NXQ-15:> #0869 10 T1=000, T2=000, V1= ON rpi 09/09/26-23:39:02 - :
W6GR-2>APD000,WIDE2-2,qAR,KF6NXQ-15:> #0868 10 T1=000, T2=000, V1= ON rpi 09/09/26-23:19:02 - :
W6GR-2>APD000,WIDE2-2,qAR,KF6NXQ-15:> #0867 10 T1=000, T2=000, V1= ON rpi 09/09/26-22:59:02 - :
W6GR-2>APD000,WIDE2-2,qAR,KF6NXQ-15:> #0866 10 T1=000, T2=000, V1= ON rpi 09/09/26-22:39:02 - :
W6GR-2>APD000,WIDE2-2,qAR,KF6NXQ-15:> #0865 10 T1=000, T2=000, V1= ON rpi 09/09/26-22:19:01 - :
W6GR-2>APD000,KF6ILA-10*,qAO,KA9Q:> #0864 10 T1=000, T2=000, V1= ON rpi 09/09/26-21:59:01 - :
W6GR-2>APD000,WIDE2-2,qAR,KF6NXQ-15:> #0864 10 T1=000, T2=000, V1= ON rpi 09/09/26-21:59:01 - :
W6GR-2>APD000,WIDE2-2,qAR,KF6NXQ-15:> #0863 10 T1=000, T2=000, V1= ON rpi 09/09/26-21:39:01 - :
W6GR-2>APD000,WIDE2-2,qAR,KF6NXQ-15:> #0862 10 T1=000, T2=000, V1= ON rpi 09/09/26-21:19:01 - :
W6GR-2>APD000,WIDE2-2,qAR,KF6NXQ-15:> #0861 10 T1=000, T2=000, V1= ON rpi 09/09/26-20:59:01 - :
W6GR-2>APD000,WIDE2-2,qAR,KF6NXQ-15:> #0860 10 T1=000, T2=000, V1= ON rpi 09/09/26-20:39:01 - :
W6GR-2>APD000,WIDE2-2,qAR,KF6NXQ-15:> #0859 10 T1=000, T2=000, V1= ON rpi 09/09/26-20:19:01 - :
W6GR-2>APD000,WIDE2-2,qAR,KF6NXQ-15:> #0858 10 T1=000, T2=000, V1= ON rpi 09/09/26-19:59:00 - :
W6GR-2>APD000,WIDE2-2,qAR,KF6NXQ-15:> #0857 10 T1=000, T2=000, V1= ON rpi 09/09/26-19:39:00 - :
W6GR-2>APD000,WIDE2-2,qAR,KF6NXQ-15:> #0856 10 T1=000, T2=000, V1= ON rpi 09/09/26-19:19:00 - :
W6GR-2>APD000,WIDE2-2,qAR,KF6NXQ-15:> #0855 10 T1=000, T2=000, V1= ON rpi 09/09/26-18:59:00 - :
W6GR-2>APD000,WIDE2-2,qAR,KF6NXQ-15:> #0854 10 T1=000, T2=000, V1= ON rpi 09/09/26-18:39:00 - :
W6GR-2>APD000,WIDE2-2,qAR,KF6NXQ-15:> #0853 10 T1=000, T2=000, V1= ON rpi 09/09/26-18:19:00 - :
W6GR-2>APD000,WIDE2-2,qAR,KF6NXQ-15:> #0852 10 T1=000, T2=000, V1= ON rpi 09/09/26-17:59:00 - :
W6GR-2>APD000,WIDE2-2,qAR,KF6NXQ-15:> #0851 10 T1=000, T2=000, V1= ON rpi 09/09/26-17:39:00 - :
W6GR-2>APD000,WIDE2-2,qAR,KF6NXQ-15:> #0850 10 T1=000, T2=000, V1= ON rpi 09/09/26-17:18:59 - :
W6GR-2>APD000,WIDE2-2,qAR,KF6NXQ-15:> #0849 10 T1=000, T2=000, V1= ON rpi 09/09/26-16:58:59 - :
W6GR-2>APD000,WIDE2-2,qAR,KF6NXQ-15:> #0848 10 T1=000, T2=000, V1= ON rpi 09/09/26-16:38:59 - :
W6GR-2>APD000,WIDE2-2,qAR,KF6NXQ-15:> #0847 10 T1=000, T2=000, V1= ON rpi 09/09/26-16:18:59 - :
W6GR-2>APD000,WIDE2-2,qAR,KF6NXQ-15:> #0846 10 T1=000, T2=000, V1= ON rpi 09/09/26-15:58:59 - :
W6GR-2>APD000,WIDE2-2,qAR,KF6NXQ-15:> #0845 10 T1=000, T2=000, V1= ON rpi 09/09/26-15:38:59 - :
W6GR-2>APD000,WIDE2-2,qAR,KF6NXQ-15:> #0844 10 T1=000, T2=000, V1= ON rpi 09/09/26-15:18:59 - :
W6GR-2>APD000,WIDE2-2,qAR,KF6NXQ-15:> #0843 10 T1=000, T2=000, V1= ON rpi 09/09/26-14:58:59 - :
W6GR-2>APD000,WIDE2-2,qAR,KF6NXQ-15:> #0842 10 T1=000, T2=000, V1= ON rpi 09/09/26-14:38:58 - :
W6GR-2>APD000,WIDE2-2,qAR,KF6NXQ-15:> #0841 10 T1=000, T2=000, V1= ON rpi 09/09/26-14:18:58 - :
W6GR-2>APD000,WIDE2-2,qAR,KF6NXQ-15:> #0840 10 T1=000, T2=000, V1= ON rpi 09/09/26-13:58:58 - :
W6GR-2>APD000,WIDE2-2,qAR,KF6NXQ-15:> #0839 10 T1=000, T2=000, V1= ON rpi 09/09/26-13:38:58 - :
W6GR-2>APD000,WIDE2-2,qAR,KF6NXQ-15:> #0838 10 T1=000, T2=000, V1= ON rpi 09/09/26-13:18:58 - :
W6GR-2>APD000,WIDE2-2,qAR,KF6NXQ-15:> #0837 10 T1=000, T2=000, V1= ON rpi 09/09/26-12:58:58 - :
W6GR-2>APD000,WIDE2-2,qAR,KF6NXQ-15:> #0836 10 T1=000, T2=000, V1= ON rpi 09/09/26-12:38:58 - :
W6GR-2>APD000,WIDE2-2,qAR,KF6NXQ-15:> #0835 10 T1=000, T2=000, V1= ON rpi 09/09/26-12:18:57 - :
W6GR-2>APD000,KF6ILA-10*,qAO,W6UFX:> #0834 10 T1=000, T2=000, V1= ON rpi 09/09/26-11:58:57 - :
W6GR-2>APD000,WIDE2-2,qAR,KF6NXQ-15:> #0834 10 T1=000, T2=000, V1= ON rpi 09/09/26-11:58:57 - :
W6GR-2>APD000,WIDE2-2,qAR,KF6NXQ-15:> #0833 10 T1=000, T2=000, V1= ON rpi 09/09/26-11:38:57 - :
W6GR-2>APD000,WIDE2-2,qAR,KF6NXQ-15:> #0832 10 T1=000, T2=000, V1= ON rpi 09/09/26-11:18:57 - :
W6GR-2>APD000,WIDE2-2,qAR,KF6NXQ-15:> #0831 10 T1=000, T2=000, V1= ON rpi 09/09/26-10:58:57 - :
W6GR-2>APD000,WIDE2-2,qAR,KF6NXQ-15:> #0830 10 T1=000, T2=000, V1= ON rpi 09/09/26-10:38:57 - :
W6GR-2>APD000,WIDE2-2,qAR,KF6NXQ-15:> #0829 10 T1=000, T2=000, V1= ON rpi 09/09/26-10:18:57 - :
W6GR-2>APD000,WIDE2-2,qAR,KF6NXQ-15:> #0828 10 T1=000, T2=000, V1= ON rpi 09/09/26-09:58:57 - :
W6GR-2>APD000,WIDE2-2,qAR,KF6NXQ-15:> #0827 10 T1=000, T2=000, V1= ON rpi 09/09/26-09:38:57 - :
W6GR-2>APD000,WIDE2-2,qAR,KF6NXQ-15:> #0825 10 T1=000, T2=000, V1= ON rpi 09/09/26-08:58:56 - :
W6GR-2>APD000,WIDE2-2,qAR,KF6NXQ-15:> #0824 10 T1=000, T2=000, V1= ON rpi 09/09/26-08:38:56 - :
W6GR-2>APD000,WIDE2-2,qAR,KF6NXQ-15:> #0823 10 T1=000, T2=000, V1= ON rpi 09/09/26-08:18:56 - :
W6GR-2>APD000,WIDE2-2,qAR,KF6NXQ-15:> #0822 10 T1=000, T2=000, V1= ON rpi 09/09/26-07:58:56 - :
W6GR-2>APD000,WIDE2-2,qAR,KF6NXQ-15:> #0821 10 T1=000, T2=000, V1= ON rpi 09/09/26-07:38:56 - :
W6GR-2>APD000,WIDE2-2,qAR,KF6NXQ-15:> #0820 10 T1=000, T2=000, V1= ON rpi 09/09/26-07:18:56 - :
W6GR-2>APD000,WIDE2-2,qAR,KF6NXQ-15:> #0819 10 T1=000, T2=000, V1= ON rpi 09/09/26-06:58:55 - :
W6GR-2>APD000,WIDE2-2,qAR,KF6NXQ-15:> #0818 10 T1=000, T2=000, V1= ON rpi 09/09/26-06:38:55 - :
W6GR-2>APD000,WIDE2-2,qAR,KF6NXQ-15:> #0817 10 T1=000, T2=000, V1= ON rpi 09/09/26-06:18:55 - :
W6GR-2>APD000,WIDE2-2,qAR,KF6NXQ-15:> #0816 10 T1=000, T2=000, V1= ON rpi 09/09/26-05:58:55 - :
W6GR-2>APD000,WIDE2-2,qAR,KF6NXQ-15:> #0815 10 T1=000, T2=000, V1= ON rpi 09/09/26-05:38:55 - :
W6GR-2>APD000,WIDE2-2,qAR,KF6NXQ-15:> #0814 10 T1=000, T2=000, V1= ON rpi 09/09/26-05:18:55 - :
W6GR-2>APD000,WIDE2-2,qAR,KF6NXQ-15:> #0813 10 T1=000, T2=000, V1= ON rpi 09/09/26-04:58:55 - :
W6GR-2>APD000,WIDE2-2,qAR,KF6NXQ-15:> #0812 10 T1=000, T2=000, V1= ON rpi 09/09/26-04:38:54 - :
W6GR-2>APD000,WIDE2-2,qAR,KF6NXQ-15:> #0811 10 T1=000, T2=000, V1= ON rpi 09/09/26-04:18:54 - :
W6GR-2>APD000,WIDE2-2,qAR,KF6NXQ-15:> #0810 10 T1=000, T2=000, V1= ON rpi 09/09/26-03:58:54 - :
W6GR-2>APD000,WIDE2-2,qAR,KF6NXQ-15:> #0809 10 T1=000, T2=000, V1= ON rpi 09/09/26-03:38:54 - :
W6GR-2>APD000,WIDE2-2,qAR,KF6NXQ-15:> #0808 10 T1=000, T2=000, V1= ON rpi 09/09/26-03:18:54 - :
W6GR-2>APD000,WIDE2-2,qAR,KF6NXQ-15:> #0807 10 T1=000, T2=000, V1= ON rpi 09/09/26-02:58:54 - :
W6GR-2>APD000,WIDE2-2,qAR,KF6NXQ-15:> #0806 10 T1=000, T2=000, V1= ON rpi 09/09/26-02:38:54 - :
W6GR-2>APD000,WIDE2-2,qAR,KF6NXQ-15:> #0805 10 T1=000, T2=000, V1= ON rpi 09/09/26-02:18:53 - :
W6GR-2>APD000,WIDE2-2,qAR,KF6NXQ-15:> #0804 10 T1=000, T2=000, V1= ON rpi 09/09/26-01:58:53 - :
W6GR-2>APD000,WIDE2-2,qAR,KF6NXQ-15:> #0803 10 T1=000, T2=000, V1= ON rpi 09/09/26-01:38:53 - :
W6GR-2>APD000,WIDE2-2,qAR,KF6NXQ-15:> #0802 10 T1=000, T2=000, V1= ON rpi 09/09/26-01:18:53 - :
W6GR-2>APD000,KF6ILA-10*,qAR,AK6QN-10:> #0801 10 T1=000, T2=000, V1= ON rpi 09/09/26-00:58:53 - :
W6GR-2>APD000,WIDE2-2,qAR,KF6NXQ-15:> #0801 10 T1=000, T2=000, V1= ON rpi 09/09/26-00:58:53 - :
W6GR-2>APD000,WIDE2-2,qAR,KF6NXQ-15:> #0800 10 T1=000, T2=000, V1= ON rpi 09/09/26-00:38:53 - :
W6GR-2>APD000,WIDE2-2,qAR,KF6NXQ-15:> #0799 10 T1=000, T2=000, V1= ON rpi 09/09/26-00:18:53 - :
W6GR-2>APD000,WIDE2-2,qAR,KF6NXQ-15:> #0798 10 T1=000, T2=000, V1= ON rpi 09/08/26-23:58:53 - :
W6GR-2>APD000,WIDE2-2,qAR,KF6NXQ-15:> #0797 10 T1=000, T2=000, V1= ON rpi 09/08/26-23:38:52 - :
W6GR-2>APD000,WIDE2-2,qAR,KF6NXQ-15:> #0796 10 T1=000, T2=000, V1= ON rpi 09/08/26-23:18:52 - :
W6GR-2>APD000,KF6ILA-10*,qAR,W6ZU-10:> #0795 10 T1=000, T2=000, V1= ON rpi 09/08/26-22:58:52 - :
W6GR-2>APD000,WIDE2-2,qAR,KF6NXQ-15:> #0794 10 T1=000, T2=000, V1= ON rpi 09/08/26-22:38:52 - :
W6GR-2>APD000,WIDE2-2,qAR,KF6NXQ-15:> #0793 10 T1=000, T2=000, V1= ON rpi 09/08/26-22:18:52 - :
W6GR-2>APD000,WIDE2-2,qAR,KF6NXQ-15:> #0792 10 T1=000, T2=000, V1= ON rpi 09/08/26-21:58:52 - :
W6GR-2>APD000,WIDE2-2,qAR,KF6NXQ-15:> #0791 10 T1=000, T2=000, V1= ON rpi 09/08/26-21:38:52 - :
W6GR-2>APD000,WIDE2-2,qAR,KF6NXQ-15:> #0790 10 T1=000, T2=000, V1= ON rpi 09/08/26-21:18:52 - :
W6GR-2>APD000,WIDE2-2,qAR,KF6NXQ-15:> #0789 10 T1=000, T2=000, V1= ON rpi 09/08/26-20:58:52 - :
W6GR-2>APD000,WIDE2-2,qAR,KF6NXQ-15:> #0788 10 T1=000, T2=000, V1= ON rpi 09/08/26-20:38:51 - :
W6GR-2>APD000,WIDE2-2,qAR,KF6NXQ-15:> #0787 10 T1=000, T2=000, V1= ON rpi 09/08/26-20:18:51 - :
W6GR-2>APD000,WIDE2-2,qAR,KF6NXQ-15:> #0786 10 T1=000, T2=000, V1= ON rpi 09/08/26-19:58:51 - :
W6GR-2>APD000,WIDE2-2,qAR,KF6NXQ-15:> #0785 10 T1=000, T2=000, V1= ON rpi 09/08/26-19:38:51 - :
W6GR-2>APD000,WIDE2-2,qAR,KF6NXQ-15:> #0784 10 T1=000, T2=000, V1= ON rpi 09/08/26-19:18:51 - :
W6GR-2>APD000,WIDE2-2,qAR,KF6NXQ-15:> #0783 10 T1=000, T2=000, V1= ON rpi 09/08/26-18:58:51 - :
W6GR-2>APD000,WIDE2-2,qAR,KF6NXQ-15:> #0782 10 T1=000, T2=000, V1= ON rpi 09/08/26-18:38:51 - :
W6GR-2>APD000,WIDE2-2,qAR,KF6NXQ-15:> #0781 10 T1=000, T2=000, V1= ON rpi 09/08/26-18:18:51 - :
W6GR-2>APD000,KF6ILA-10*,qAO,KA9Q:> #0780 10 T1=000, T2=000, V1= ON rpi 09/08/26-17:58:50 - :
W6GR-2>APD000,WIDE2-2,qAR,KF6NXQ-15:> #0780 10 T1=000, T2=000, V1= ON rpi 09/08/26-17:58:50 - :
W6GR-2>APD000,WIDE2-2,qAR,KF6NXQ-15:> #0779 10 T1=000, T2=000, V1= ON rpi 09/08/26-17:38:50 - :
W6GR-2>APD000,WIDE2-2,qAR,KF6NXQ-15:> #0778 10 T1=000, T2=000, V1= ON rpi 09/08/26-17:18:50 - :
W6GR-2>APD000,WIDE2-2,qAR,KF6NXQ-15:> #0777 10 T1=000, T2=000, V1= ON rpi 09/08/26-16:58:50 - :
W6GR-2>APD000,WIDE2-2,qAR,KF6NXQ-15:> #0776 10 T1=000, T2=000, V1= ON rpi 09/08/26-16:38:50 - :
W6GR-2>APD000,WIDE2-2,qAR,KF6NXQ-15:> #0775 10 T1=000, T2=000, V1= ON rpi 09/08/26-16:18:50 - :
W6GR-2>APD000,WIDE2-2,qAR,KF6NXQ-15:> #0774 10 T1=000, T2=000, V1= ON rpi 09/08/26-15:58:50 - :
W6GR-2>APD000,WIDE2-2,qAR,KF6NXQ-15:> #0773 10 T1=000, T2=000, V1= ON rpi 09/08/26-15:38:49 - :
W6GR-2>APD000,WIDE2-2,qAR,KF6NXQ-15:> #0772 10 T1=000, T2=000, V1= ON rpi 09/08/26-15:18:49 - :
W6GR-2>APD000,WIDE2-2,qAR,KF6NXQ-15:> #0771 10 T1=000, T2=000, V1= ON rpi 09/08/26-14:58:49 - :
W6GR-2>APD000,WIDE2-2,qAR,KF6NXQ-15:> #0770 10 T1=000, T2=000, V1= ON rpi 09/08/26-14:38:49 - :
W6GR-2>APD000,WIDE2-2,qAR,KF6NXQ-15:> #0769 10 T1=000, T2=000, V1= ON rpi 09/08/26-14:18:49 - :
W6GR-2>APD000,WIDE2-2,qAR,KF6NXQ-15:> #0768 10 T1=000, T2=000, V1= ON rpi 09/08/26-13:58:49 - :
W6GR-2>APD000,WIDE2-2,qAR,KF6NXQ-15:> #0767 10 T1=000, T2=000, V1= ON rpi 09/08/26-13:38:48 - :
W6GR-2>APD000,WIDE2-2,qAR,KF6NXQ-15:> #0766 10 T1=000, T2=000, V1= ON rpi 09/08/26-13:18:48 - :
W6GR-2>APD000,WIDE2-2,qAR,KF6NXQ-15:> #0765 10 T1=000, T2=000, V1= ON rpi 09/08/26-12:58:48 - :
W6GR-2>APD000,WIDE2-2,qAR,KF6NXQ-15:> #0764 10 T1=000, T2=000, V1= ON rpi 09/08/26-12:38:48 - :
W6GR-2>APD000,WIDE2-2,qAR,KF6NXQ-15:> #0763 10 T1=000, T2=000, V1= ON rpi 09/08/26-12:18:48 - :
W6GR-2>APD000,WIDE2-2,qAR,KF6NXQ-15:> #0762 10 T1=000, T2=000, V1= ON rpi 09/08/26-11:58:48 - :
W6GR-2>APD000,WIDE2-2,qAR,KF6NXQ-15:> #0761 10 T1=000, T2=000, V1= ON rpi 09/08/26-11:38:48 - :
W6GR-2>APD000,WIDE2-2,qAR,KF6NXQ-15:> #0760 10 T1=000, T2=000, V1= ON rpi 09/08/26-11:18:48 - :
W6GR-2>APD000,WIDE2-2,qAR,KF6NXQ-15:> #0759 10 T1=000, T2=000, V1= ON rpi 09/08/26-10:58:47 - :
W6GR-2>APD000,WIDE2-2,qAR,KF6NXQ-15:> #0758 10 T1=000, T2=000, V1= ON rpi 09/08/26-10:38:47 - :
W6GR-2>APD000,WIDE2-2,qAR,KF6NXQ-15:> #0757 10 T1=000, T2=000, V1= ON rpi 09/08/26-10:18:47 - :
W6GR-2>APD000,WIDE2-2,qAR,KF6NXQ-15:> #0756 10 T1=000, T2=000, V1= ON rpi 09/08/26-09:58:47 - :
W6GR-2>APD000,WIDE2-2,qAR,KF6NXQ-15:> #0755 10 T1=000, T2=000, V1= ON rpi 09/08/26-09:38:47 - :
W6GR-2>APD000,WIDE2-2,qAR,KF6NXQ-15:> #0754 10 T1=000, T2=000, V1= ON rpi 09/08/26-09:18:47 - :
W6GR-2>APD000,WIDE2-2,qAR,KF6NXQ-15:> #0752 10 T1=000, T2=000, V1= ON rpi 09/08/26-08:38:46 - :
W6GR-2>APD000,WIDE2-2,qAR,KF6NXQ-15:> #0751 10 T1=000, T2=000, V1= ON rpi 09/08/26-08:18:46 - :
W6GR-2>APD000,WIDE2-2,qAR,KF6NXQ-15:> #0750 10 T1=000, T2=000, V1= ON rpi 09/08/26-07:58:46 - :
W6GR-2>APD000,WIDE2-2,qAR,KF6NXQ-15:> #0749 10 T1=000, T2=000, V1= ON rpi 09/08/26-07:38:46 - :
W6GR-2>APD000,WIDE2-2,qAR,KF6NXQ-15:> #0748 10 T1=000, T2=000, V1= ON rpi 09/08/26-07:18:46 - :
W6GR-2>APD000,WIDE2-2,qAR,KF6NXQ-15:> #0747 10 T1=000, T2=000, V1= ON rpi 09/08/26-06:58:46 - :
W6GR-2>APD000,WIDE2-2,qAR,KF6NXQ-15:> #0745 10 T1=000, T2=000, V1= ON rpi 09/08/26-06:18:46 - :
W6GR-2>APD000,WIDE2-2,qAR,KF6NXQ-15:> #0744 10 T1=000, T2=000, V1= ON rpi 09/08/26-05:58:46 - :
W6GR-2>APD000,WIDE2-2,qAR,KF6NXQ-15:> #0743 10 T1=000, T2=000, V1= ON rpi 09/08/26-05:38:45 - :
W6GR-2>APD000,WIDE2-2,qAR,KF6NXQ-15:> #0742 10 T1=000, T2=000, V1= ON rpi 09/08/26-05:18:45 - :
W6GR-2>APD000,WIDE2-2,qAR,KF6NXQ-15:> #0741 10 T1=000, T2=000, V1= ON rpi 09/08/26-04:58:45 - :
W6GR-2>APD000,WIDE2-2,qAR,KF6NXQ-15:> #0740 10 T1=000, T2=000, V1= ON rpi 09/08/26-04:38:45 - :
W6GR-2>APD000,WIDE2-2,qAR,KF6NXQ-15:> #0739 10 T1=000, T2=000, V1= ON rpi 09/08/26-04:18:45 - :
W6GR-2>APD000,WIDE2-2,qAR,KF6NXQ-15:> #0738 10 T1=000, T2=000, V1= ON rpi 09/08/26-03:58:45 - :
W6GR-2>APD000,WIDE2-2,qAR,KF6NXQ-15:> #0737 10 T1=000, T2=000, V1= ON rpi 09/08/26-03:38:45 - :
W6GR-2>APD000,WIDE2-2,qAR,KF6NXQ-15:> #0736 10 T1=000, T2=000, V1= ON rpi 09/08/26-03:18:44 - :
W6GR-2>APD000,WIDE2-2,qAR,KF6NXQ-15:> #0735 10 T1=000, T2=000, V1= ON rpi 09/08/26-02:58:44 - :
W6GR-2>APD000,WIDE2-2,qAR,KF6NXQ-15:> #0734 10 T1=000, T2=000, V1= ON rpi 09/08/26-02:38:44 - :
W6GR-2>APD000,WIDE2-2,qAR,KF6NXQ-15:> #0733 10 T1=000, T2=000, V1= ON rpi 09/08/26-02:18:44 - :
W6GR-2>APD000,WIDE2-2,qAR,KF6NXQ-15:> #0732 10 T1=000, T2=000, V1= ON rpi 09/08/26-01:58:44 - :
W6GR-2>APD000,WIDE2-2,qAR,KF6NXQ-15:> #0731 10 T1=000, T2=000, V1= ON rpi 09/08/26-01:38:44 - :
W6GR-2>APD000,WIDE2-2,qAR,KF6NXQ-15:> #0730 10 T1=000, T2=000, V1= ON rpi 09/08/26-01:18:44 - :
W6GR-2>APD000,WIDE2-2,qAR,KF6NXQ-15:> #0729 10 T1=000, T2=000, V1= ON rpi 09/08/26-00:58:44 - :
W6GR-2>APD000,WIDE2-2,qAR,KF6NXQ-15:> #0728 10 T1=000, T2=000, V1= ON rpi 09/08/26-00:38:43 - :
W6GR-2>APD000,WIDE2-2,qAR,KF6NXQ-15:> #0727 10 T1=000, T2=000, V1= ON rpi 09/08/26-00:18:43 - :
W6GR-2>APD000,WIDE2-2,qAR,KF6NXQ-15:> #0726 10 T1=000, T2=000, V1= ON rpi 09/07/26-23:58:43 - :
W6GR-2>APD000,WIDE2-2,qAR,KF6NXQ-15:> #0725 10 T1=000, T2=000, V1= ON rpi 09/07/26-23:38:43 - :
W6GR-2>APD000,WIDE2-2,qAR,KF6NXQ-15:> #0724 10 T1=000, T2=000, V1= ON rpi 09/07/26-23:18:43 - :
W6GR-2>APD000,WIDE2-2,qAR,KF6NXQ-15:> #0723 10 T1=000, T2=000, V1= ON rpi 09/07/26-22:58:43 - :
W6GR-2>APD000,WIDE2-2,qAR,KF6NXQ-15:> #0722 10 T1=000, T2=000, V1= ON rpi 09/07/26-22:38:43 - :
W6GR-2>APD000,WIDE2-2,qAR,KF6NXQ-15:> #0721 10 T1=000, T2=000, V1= ON rpi 09/07/26-22:18:42 - :
W6GR-2>APD000,WIDE2-2,qAR,KF6NXQ-15:> #0720 10 T1=000, T2=000, V1= ON rpi 09/07/26-21:58:42 - :
W6GR-2>APD000,WIDE2-2,qAR,KF6NXQ-15:> #0719 10 T1=000, T2=000, V1= ON rpi 09/07/26-21:38:42 - :
W6GR-2>APD000,WIDE2-2,qAR,KF6NXQ-15:> #0718 10 T1=000, T2=000, V1= ON rpi 09/07/26-21:18:42 - :
W6GR-2>APD000,WIDE2-2,qAR,KF6NXQ-15:> #0717 10 T1=000, T2=000, V1= ON rpi 09/07/26-20:58:42 - :
W6GR-2>APD000,WIDE2-2,qAR,KF6NXQ-15:> #0716 10 T1=000, T2=000, V1= ON rpi 09/07/26-20:38:42 - :
W6GR-2>APD000,KF6ILA-10*,qAO,KA9Q:> #0715 10 T1=000, T2=000, V1= ON rpi 09/07/26-20:18:42 - :
W6GR-2>APD000,WIDE2-2,qAR,KF6NXQ-15:> #0715 10 T1=000, T2=000, V1= ON rpi 09/07/26-20:18:42 - :
W6GR-2>APD000,WIDE2-2,qAR,KF6NXQ-15:> #0714 10 T1=000, T2=000, V1= ON rpi 09/07/26-19:58:42 - :
W6GR-2>APD000,WIDE2-2,qAR,KF6NXQ-15:> #0713 10 T1=000, T2=000, V1= ON rpi 09/07/26-19:38:42 - :
W6GR-2>APD000,WIDE2-2,qAR,KF6NXQ-15:> #0712 10 T1=000, T2=000, V1= ON rpi 09/07/26-19:18:41 - :
W6GR-2>APD000,WIDE2-2,qAR,KF6NXQ-15:> #0711 10 T1=000, T2=000, V1= ON rpi 09/07/26-18:58:41 - :
W6GR-2>APD000,WIDE2-2,qAR,KF6NXQ-15:> #0710 10 T1=000, T2=000, V1= ON rpi 09/07/26-18:38:41 - :
W6GR-2>APD000,WIDE2-2,qAR,KF6NXQ-15:> #0709 10 T1=000, T2=000, V1= ON rpi 09/07/26-18:18:41 - :
W6GR-2>APD000,WIDE2-2,qAR,KF6NXQ-15:> #0708 10 T1=000, T2=000, V1= ON rpi 09/07/26-17:58:41 - :
W6GR-2>APD000,WIDE2-2,qAR,KF6NXQ-15:> #0707 10 T1=000, T2=000, V1= ON rpi 09/07/26-17:38:41 - :
W6GR-2>APD000,WIDE2-2,qAR,KF6NXQ-15:> #0706 10 T1=000, T2=000, V1= ON rpi 09/07/26-17:18:41 - :
W6GR-2>APD000,WIDE2-2,qAR,KF6NXQ-15:> #0705 10 T1=000, T2=000, V1= ON rpi 09/07/26-16:58:41 - :
W6GR-2>APD000,WIDE2-2,qAR,KF6NXQ-15:> #0704 10 T1=000, T2=000, V1= ON rpi 09/07/26-16:38:40